1. Field of the Invention
The present invention relates to the semiconductor device, more particularly, to a semiconductor device with a self-aligned contact, and a method of manufacturing the same.
2. Description of the Related Art
In order for miniaturization and integration of semiconductor devices, it is important that a distance between a gate electrode and a diffusion layer contact of a transistor is shortened.
In the conventional art, a gate electrode and a diffusion layer contact are formed with a certain distance therebetween to prevent them from contacting to each other. This prevents miniaturization and integration of semiconductor devices.
As a method to shorten the distance between a gate electrode and a diffusion layer contact, a method is proposed in which the diffusion layer contact is formed in a self-alignment manner with respect to the gate electrode. However, this method has the following problem. That is, when a contact hole for a diffusion layer contact is formed to overlap with a gate electrode, a protection oxidation film formed on the side of the gate electrode is subject to etching. As a method for avoiding this, the following method is known. This method forms a protection oxidation film on the side of the gate electrode. Then, a nitride film (a stopper film) having a selection ratio with respect to the oxidation film is formed on the upper and side surface of the protection oxidation film (Japanese Patent Laid-Open No. 2000-340792).
This method uses the nitride film formed on the upper and side surface of the protection oxidation film as the stopper. Therefore, it can prevent the protection oxidation film from being etched. However, when a nitride film with a lot of electric-charge traps is formed close to a silicon substrate surface, transistor properties may fluctuate. This is regarded as a problem.
In addition, when a nitride film is formed on the side of the gate electrode in the nonvolatile semiconductor storage device, there arises a problem that the electric-charge retention property thereof deteriorates, and the parasitic capacitance thereof increases. This is also regarded as a problem.
Therefore, with the conventional art, it is difficult to provide a small semiconductor device that can be formed without deteriorating transistor properties.